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Table of Contents
Appendices
Basic Logic
- Crude Awakening
- NAND Gate
- NOT Gate
- NOR Gate
- OR Gate
- AND Gate
- Always On
- Second Tick
- XOR Gate
- Bigger OR Gate
- Bigger AND Gate
- XNOR Gate
Arithmetic
Memory
- Circular Dependency
- Delayed Lines
- Odd Ticks
- Bit Inverter
- Bit Switch
- Input Selector
- The bus
- Saving Gracefully
- Saving Bytes
- Little Box
- Counter
CPU Architecture
- Arithmetic Engine
- Registers
- Component Factory
- Instruction Decoder
- Calculations
- Program
- Conditions
- Immediate Values
- Turing Complete
Programming
CPU Architecture 2
- XOR
- Byte Constant
- Byte XOR
- Equality
- Unsigned Less
- Signed Less
- Wide Instructions
- Wire Spaghetti
- Opcodes
- Immediate Values
- Conditionals
Functions
Assembly Challenges
Gate optimal[edit]
Implement an array of Full Adder circuits. Make sure you use the second half-adder of the full adder for the carry to get decently good performance.
Delay optimal[edit]
Implement a "carry lookahead adder".
Go to top
← Full Adder | Adding Bytes | Negative Numbers →
Table of Contents
Appendices
Basic Logic
- Crude Awakening
- NAND Gate
- NOT Gate
- NOR Gate
- OR Gate
- AND Gate
- Always On
- Second Tick
- XOR Gate
- Bigger OR Gate
- Bigger AND Gate
- XNOR Gate
Arithmetic
Memory
- Circular Dependency
- Delayed Lines
- Odd Ticks
- Bit Inverter
- Bit Switch
- Input Selector
- The bus
- Saving Gracefully
- Saving Bytes
- Little Box
- Counter
CPU Architecture
- Arithmetic Engine
- Registers
- Component Factory
- Instruction Decoder
- Calculations
- Program
- Conditions
- Immediate Values
- Turing Complete
Programming
CPU Architecture 2
- XOR
- Byte Constant
- Byte XOR
- Equality
- Unsigned Less
- Signed Less
- Wide Instructions
- Wire Spaghetti
- Opcodes
- Immediate Values
- Conditionals
Functions
Assembly Challenges
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